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JAYASHANKAR NARAYANANKUTTY
Talent, not design software, is the biggest bill for chip startups: Cadence's Jayashankar NarayanankuttyNarayanankutty told ET AI during SEMICON India 2026 that India needs more engineers across the semiconductor ecosystem, including design an...- ISM 2.0 paradox: Tough IP rules might leave startups starving for global cashThe India Semiconductor Mission (ISM) 2.0 was notified on Monday. The domestic chip design industry welcomed the large, updated design-link...
- Cadence AI cuts chip timelinesSan Jose-headquartered Cadence Design Systems provides electronic design automation (EDA) software, hardware and intellectual property (IP)...
- AI turbocharges chip design: Cadence, Samsung, Tessolve units see India at heart of next-gen semiconductor R&DArtificial intelligence (AI) is rapidly reshaping how complex chips are conceived, verified and brought to market, with global players such...
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