India’s largest pre-silicon chip validation facility opens at C-DAC Bengaluru

The Centre for Development of Advanced Computing (C-DAC) has launched the PRITVI-ACE pre-silicon validation facility in Bengaluru to strengthen India’s semiconductor design ecosystem. According to C-DAC officials, it enables end-to-end validation,...

Agencies
The Centre for Development of Advanced Computing (C-DAC) on Friday opened a pre-silicon validation facility in Bengaluru that is expected to provide a significant boost to India’s semiconductor design ecosystem.

The facility, PRITVI-ACE, short for Platform for Reconfigurable Integrated Testing and Validation of IPs - Advanced Chip Evaluation, enables large-scale, near-silicon-speed prototyping and validation of advanced semiconductor designs, a critical requirement as chip complexity continues to rise.

According to C-DAC officials, it enables end-to-end validation, from individual IP blocks to full system-level designs, well before silicon fabrication. These include early operating system boot, firmware and driver validation, protocol compliance checks and performance benchmarking at near-real-world speeds. Such capabilities are expected to drastically improve first-silicon success rates and lower development costs for chip designers.


The platform can accommodate designs as large as 48-core high-performance CPUs, while also supporting multiple smaller designs in parallel. This, officials said, will accelerate indigenous development of processors for high-performance computing, artificial intelligence and advanced networking applications.

S Krishnan, secretary at the Ministry of Electronics and Information Technology, inaugurated the facility. He said PRITVI-ACE will function as a national shared resource, supporting strategic R&D programmes under National Supercomputing Mission and India Semiconductor Mission, as well as startups and academic institutions under initiatives such as Chips to Startups and Design Linked Incentive scheme.

CDAC director-general E Magesh said the initiative is part of a broader effort to create multiple evaluation platforms that can significantly reduce design risk and time-to-market for indigenous chips.
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Magesh described the facility as a “game-changer” for Indian chip designers, particularly those working on high-performance CPUs, GPUs, AI accelerators, network processors and chiplet-based architectures. By eliminating the need for each project to build a custom FPGA board (development platform), PRITVI-ACE is expected to reduce duplication of effort and capital expenditure across the ecosystem.

The launch comes at a time when India is pushing to transition from a services-led electronics ecosystem to a product-driven semiconductor nation, said SD Sudarsan, executive director, CDAC, Bengaluru.

The system is built on Siemens EDA’s Veloce Pro FPGA platform and powered by AMD Xilinx VP1942 FPGAs.

PRITVI-ACE is the largest such civil design and validation facility in India, said Ruchir Dixit, vice-president and country manager, Siemens EDA.
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