India sees $11–12 bn chip investment interest under Semicon 2.0: Ashwini Vaishnaw

Under Semicon 2.0, India is seeing interest in semiconductor investment of around Rs 1 lakh crore ($11–12 billion), as companies explore projects in chip design, equipment manufacturing, fabrication and advanced packaging, Union electronics and information technology minister Ashwini Vaishnaw said on Thursday.

“The investment numbers that we are seeing, as of today, are of the order of Rs 1 lakh crore or about $11-$12 billion,” Vaishnaw said while addressing the industry representatives at SEMICON India 2026.

He added the estimates were based on discussions with companies, some of which were not ready to disclose their plans publicly.


The minister said the broader ecosystem under Semicon 2.0 could create close to one lakh jobs. Semicon 2.0 is India’s expanded ₹1.27 lakh crore national policy program to deepen the country’s domestic semiconductor ecosystem.

“Semicon 1.0 was all about setting the foundation, making sure that we learn to walk. And Semicon 2.0 is more about getting the ecosystem in place,” he said.

The next phase of the government’s semiconductor programme will be built around six pillars. The first will focus on strengthening the chip-design ecosystem by helping fabless companies scale, secure funding and bring more startups as well as large companies into the fold of semiconductor design.

“The first and foremost thing is developing the design ecosystem, getting the fabless companies to scale up, get funding,” he said, adding that startups could develop innovative solutions.

The second pillar will cover semiconductor machinery and materials. Vaishnaw said Applied Materials had announced a $5 billion investment, while Lam Research and other equipment companies were also exploring a larger presence in the country.

Companies could follow one of two models – undertake design work in India or combine design with local manufacturing. “We will support both,” he said.

The third pillar will seek to attract more fabrication facilities across display, memory, silicon and compound semiconductors. “The interest is growing everyday,” Vaishnaw said, pointing to increasing confidence among global semiconductor companies.

Advanced packaging will form the fourth pillar as chipmakers increasingly use packaging techniques to improve performance and efficiency. The fifth will focus on applied research and development; the industry has been invited to propose projects jointly funded by companies and the government, and undertaken with academic institutions.

Talent development will be the sixth pillar. Vaishnaw said around 400 universities and institutes were already training students in chip design under Semicon 1.0. “It’s probably the largest semiconductor talent development program in the entire world,” he said.

The government plans to extend the curriculum from chip design to systems design. It will also target the training of more than 100,000 technicians over five years, working with industry and institutions such as Taiwan’s Industrial Technology Research Institute to establish training facilities for upcoming semiconductor factories.